Compensating inhomogeneities of neuromorphic VLSI devices via short-term synaptic plasticity

• Verfasst von: Bill, Johannes [VerfasserIn]
• Verfasst von: Schuch, Klaus [VerfasserIn]
• Verfasst von: Brüderle, Daniel [VerfasserIn]
• Verfasst von: Schemmel, Johannes [VerfasserIn]
• Verfasst von: Maass, Wolfgang [VerfasserIn]
• Verfasst von: Meier, Karlheinz [VerfasserIn]
• Titel: Compensating inhomogeneities of neuromorphic VLSI devices via short-term synaptic plasticity
• Verf.angabe: Johannes Bill, Klaus Schuch, Daniel Brüderle, Johannes Schemmel, Wolfgang Maass and Karlheinz Meier
• E-Jahr: 2010
• Jahr: 2010 Oct 8
• Umfang: 14 S.
• Fussnoten: Gesehen am 02.02.2023
• Titel Quelle: Enthalten in: Frontiers in computational neuroscience
• Ort Quelle: Lausanne : Frontiers Research Foundation, 2007
• Jahr Quelle: 2010
• Band/Heft Quelle: 4(2010), Artikel-ID 129, Seite 1-14
• ISSN Quelle: 1662-5188
• DOI: doi:10.3389/fncom.2010.00129
• Datenträger: Online-Ressource
• Sprache: eng
• K10plus-PPN: 1833083288

Abstract

Recent developments in neuromorphic hardware engineering make mixed-signal VLSI neural network models promising candidates for neuroscientific research tools and massively parallel computing devices, especially for tasks which exhaust the computing power of software simulations. Still, like all analog hardware systems, neuromorphic models suffer from a constricted configurability and production-related fluctuations of device characteristics. Since also future systems, involving ever-smaller structures, will inevitably exhibit such inhomogeneities on the unit level, self-regulation properties become a crucial requirement for their successful operation. By applying a cortically inspired self-adjusting network architecture, we show that the activity of generic spiking neural networks emulated on a neuromorphic hardware system can be kept within a biologically realistic firing regime and gain a remarkable robustness against transistor-level variations. As a first approach of this kind in engineering practice, the short-term synaptic depression and facilitation mechanisms implemented within an analog VLSI model of I&F neurons are functionally utilized for the purpose of network level stabilization. We present experimental data acquired both from the hardware model and from comparative software simulations which prove the applicability of the employed paradigm to neuromorphic VLSI devices.