Detector-embedded reconstruction of complex primitives using FPGAs

• Verfasst von: Punzi, Giovanni [VerfasserIn]
• Verfasst von: Baldini, Wander [VerfasserIn]
• Verfasst von: Bassi, Giovanni [VerfasserIn]
• Verfasst von: Contu, Andrea [VerfasserIn]
• Verfasst von: Fantechi, Riccardo [VerfasserIn]
• Verfasst von: He, Jibo [VerfasserIn]
• Verfasst von: Jashal, Brij Kishor [VerfasserIn]
• Verfasst von: Kotriakhova, Sofia [VerfasserIn]
• Verfasst von: Lazzari, Federico [VerfasserIn]
• Verfasst von: Martinelli, Maurizio [VerfasserIn]
• Verfasst von: Mendoza, Diego [VerfasserIn]
• Verfasst von: Morello, Michael J. [VerfasserIn]
• Verfasst von: De Oyanguren Campos, Arantza [VerfasserIn]
• Verfasst von: Pica, Lorenzo [VerfasserIn]
• Verfasst von: Shi, Qi [VerfasserIn]
• Verfasst von: Terzuoli, Francesco [VerfasserIn]
• Verfasst von: Tuci, Giulia [VerfasserIn]
• Verfasst von: Xu, Ao [VerfasserIn]
• Verfasst von: Zhuo, Jiahui [VerfasserIn]
• Titel: Detector-embedded reconstruction of complex primitives using FPGAs
• Verf.angabe: Giovanni Punzi, Wander Baldini, Giovanni Bassi, Andrea Contu, Riccardo Fantechi, Jibo He, Brij Kishor Jashal, Sofia Kotriakhova, Federico Lazzari, Maurizio Martinelli, Diego Mendoza, Michael J. Morello, Arantza De Oyanguren Campos, Lorenzo Pica, Qi Shi, Francesco Terzuoli, Giulia Tuci, Ao Xu, Jiahui Zhuo
• E-Jahr: 2024
• Jahr: December 2024
• Umfang: 4 S.
• Illustrationen: Illustrationen
• Fussnoten: Online verfügbar 28 August 2024, Version des Artikels 5 September 2024 ; Gesehen am 10.03.2025
• Titel Quelle: Enthalten in: Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment
• Ort Quelle: [Amsterdam] : Elsevier, 1984
• Jahr Quelle: 2024
• Band/Heft Quelle: 1069(2024) vom: Dez., Artikel-ID 169782, Seite 1-4
• ISSN Quelle: 1872-9576
• DOI: doi:10.1016/j.nima.2024.169782
• Datenträger: Online-Ressource
• Sprache: eng
• Sach-SW: DAQ
• Sach-SW: FPGA
• Sach-SW: LHCb
• Sach-SW: Trigger
• K10plus-PPN: 1919413286

Abstract

The slowdown of Moore’s law and the growing requirements of future HEP experiments with ever-increasing data rates pose important computational challenges for data reconstruction and trigger systems, encouraging the exploration of new computing methodologies. In this work we discuss a FPGA-based tracking system, relying on a massively parallel pattern recognition approach, inspired by the processing of visual images by the natural brain (“retina architecture”). This method allows a large efficiency of utilisation of the hardware, low power consumption and very low latencies. Based on this approach, a device has been designed within the LHCb Upgrade-II project, with the goal of performing track reconstruction in the forward acceptance region in real-time during the upcoming Run 4 of the LHC. This innovative device will perform track reconstruction before the event-building, in a short enough time to provide pre-reconstructed tracks (“primitives”) transparently to the processor farm, as if they had been generated directly by the detector. This allows significant savings in higher-level computing resources, enabling handling higher luminosities than otherwise possible. The feasibility of the project is backed up by the results of tests performed on a realistic hardware prototype, that has been opportunistically processing actual LHCb data in parallel with the regular DAQ in the LHC Run 3.