Polymer/metal oxide hybrid dielectrics for low voltage field-effec transistors with solution-processed, high-mobility semiconductors

• Verfasst von: Held, Martin [VerfasserIn]
• Verfasst von: Schießl, Stefan Patrick [VerfasserIn]
• Verfasst von: Miehler, Dominik [VerfasserIn]
• Verfasst von: Gannott, Florentina [VerfasserIn]
• Verfasst von: Zaumseil, Jana [VerfasserIn]
• Titel: Polymer/metal oxide hybrid dielectrics for low voltage field-effec transistors with solution-processed, high-mobility semiconductors
• Verf.angabe: Martin Held, Stefan P. Schießl, Dominik Miehler, Florentina Gannott, Jana Zaumseil
• E-Jahr: 2015
• Jahr: 25 August 2015
• Umfang: 5 S.
• Fussnoten: Gesehen am 17.08.2020
• Titel Quelle: Enthalten in: Applied physics letters
• Ort Quelle: Melville, NY : American Inst. of Physics, 1962
• Jahr Quelle: 2015
• Band/Heft Quelle: 107(2015,8) Artikel-Nummer 083301, 5 Seiten
• ISSN Quelle: 1077-3118
• DOI: doi:10.1063/1.4929461
• Datenträger: Online-Ressource
• Sprache: eng
• K10plus-PPN: 1727128192

Abstract

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.